Blog

As we head into 2016, we wanted to take a look back at the significant RapidIO.org related events of 2015. The RapidIO.org community has continued to be very active with several key initiatives underway as well as several new members joining the community.

Here are 3 key highlights from the year (a full listing of all the 2015 activity follows the 3 highlights):

• Prodrive Technologies extended its range of RapidIO Gen2 products with the PRSB-760G2, offering a market-leading 760Gbps of aggregate full-duplex bandwidth. This setup features six IDT CPS-1848 and six IDT CPS-1432 switches, creating 32 QSFP+ downlink ports and 6 CPX uplink ports, all available on the front of this 1U high 19” switch box. esigned for large node-count networks, the PRSB-760G2 enables RapidIO for large C-RAN networks, low-latency Datacenter and HPC solutions, heterogeneous Industrial and Medical networks, at an unprecedented 100ns – 300ns port-to-port latency, scalable to 64K nodes in a network of spine and leaf switches. Prodrive Technologies Launches PRSB-760G2 for large RapidIO networks

• Integrated Device Technology, Inc. has launched an Open High-Performance Analytics and Computing (HPAC) Lab to address the real-time application needs of enterprise and cloud computing end users. The Lab will help companies develop solutions for real-time analytics at hyperscale data centers through low-latency RapidIO Interconnect and advanced timing technology. The technology at the center of the lab was used for analyzing the content of Twitter traffic during the 2014 FIFAWorld Cup Finals. It was also the topic of a research project between IDT and CERN openlab, which is assessing its potential as interconnect for data centre analytics and for data acquisition in the experiments on the Large Hadron Collider. The lab is based on industry-standard ITform factor solutions that align with the Open Compute Project (OCP) High-Performance Computing initiative, which IDT co-chairs. IDT Launches Open High-Performance Analytics and Computing Lab to Integrate RapidIO Interconnect with Heterogeneous Platforms

• A3Cube® announced at SuperComputing15 a new Hardware-accelerated Software Defined System (HSDS™) architected utilizing Dell OEM solutions including Dell PowerEdge R730xd servers. Fortissimo transforms a computing rack into a powerful bare metal converged system and ultra-low latency shared storage unit, eliminating the need for traditional external storage resources and providing unmatchable performance in any application, including virtualization and data analytics. A3CUBE launches Inter Cluster communication built on RapidIO 3D Torus fabrics for Hardware-accelerated Software Defined Systems in HPC applications

 

New RapidIO.org Members for 2015

                   

RapidIO.org 2015 News

• Feb 25 IDT, NVIDIA and Orange Silicon Valley Drive Supercomputing to Edge of Wireless Network for Real-Time Analysis and Services – Integrated Device Technology, Inc. has developed with NVIDIA® and Orange Silicon Valley a supercomputing platform that can analyze 4G to 5G base station bandwidth data in real time, enabling network operators to monetize the voluminous data flowing through their communications systems.
• Feb 27 New AdvancedMC® module powered by NVIDIA® Tegra® K1 processors – Concurrent Technologies announced AG A1x/m1d, a new AdvancedMC^® (AMC) module for High Performance Embedded Computing (HPEC) applications based on multiple NVIDIA^® Tegra^® K1 mobile processors that use the same NVIDIA Kepler™ GPU core designed into supercomputers around the world.
• Mar 3 Prodrive Technologies Launches PRSB-760G2 for large RapidIO networks – Prodrive Technologies extends its range of RapidIO Gen2 products with the PRSB-760G2, offering a market-leading 760Gbps of aggregate full-duplex bandwidth.
• Mar 19 Will RapidIO Become The Fabric For ARM-Based Servers? – Original article by: Chris A. Ciufo, Editor-in-Chief, Embedded; Extension Media. Original article published on the EECatalog website.
• Mar 31 IDT Collaborates With CERN to Speed and Improve Data Analytics at Large Hadron Collider and Data Center – Integrated Device Technology, Inc. has entered a three-year collaboration with the European Organization for Nuclear Research (CERN) to use IDT’s RapidIO technology to help improve data acquisition and analysis in some of the world’s most advanced fundamental physics research.
• Apr 1 Mobiveil Announces Major Customer Design Win with a Multinational Telecommunications Company for Its RapidIO 10xN (Gen3) Digital Controller IP – Working with Leading SerDes Partners Mobiveil to Provide Pre-Verified, Fully Integrated RapidIO 10xN IP Offering Multi-Channel Data Messaging and Data Streaming at 40Gbps.
• Apr 28 42: Answer to the Ultimate Question and RapidIO Supercomputing at CERN – Article from Paul Whytock at Electropages covering the announced RapidIO based collaboration between CERN and IDT to provide low-latency RapidIO interconnect technology to improve the efficient analysis of mass data from the LHC.
• Jul 14 Enabling Heterogeneous Solutions Using Standard Communication Middleware – Article by: Girish Shirasat of Concurrent Technologies covering enabling open standard communication middleware for High Performance Embedded Computers (HPEC).
• Jul 15 IDT Launches Open High-Performance Analytics and Computing Lab to Integrate RapidIO Interconnect with Heterogeneous Platforms -Integrated Device Technology, Inc. has launched an Open High-Performance Analytics and Computing (HPAC) Lab to address the real-time application needs of enterprise and cloud computing end users. The lab supports heterogeneous processing technologies from industry-leading CPUand accelerator vendors who are connecting their hardware with IDT’s portfolio of RapidIO® and PCIe® interconnect semiconductors, advanced timing and memory interface products.
• Jul 29 IDT’s RapidIO Solutions Enable Fujitsu’s C-RAN Deployments – IDT’s RapidIO Gen2 products have been adopted by Fujitsu in its latest generation of wireless base stations. These systems are being deployed in production today in support of Cloud Radio Access Network (C-RAN) cellular network architectures and LTE and next generation LTE-A wireless standards, among others.
• Oct 14 IDT Launches Low-Latency Computing Platform to Speed Big Data Analytics and Deep Learning at the Edge of Networks The new platform is based on a 1U form factor server and features heterogeneous computing with NVIDIA® Tegra® K1 processors and x86 CPUs. The computing elements are connected using RapidIO fabric technology with about 100ns switching latency and 20 Gbps ports, with upcoming versions using RapidIO 10xN technology accelerated to 50 Gbps.
• Oct 21 BAE Systems and IDT Develop New Space-Grade Chip to Speed and Increase Data Movement in Space Built Upon IDT RapidIO Interconnect Technology, BAE Systems’ RADNET1848-PS Will Help Speed the Transfer of Data in the Harsh Environs of Space.
• Nov 18 A3CUBE launches Inter Cluster communication built on RapidIO 3D Torus fabrics for Hardware-accelerated Software Defined Systems in HPC applications A3Cube®, a leading provider of hyper-converged solutions, announced at SuperComputing15 a new Hardware-accelerated Software Defined System (HSDS™) architected utilizing Dell OEM solutions including Dell PowerEdge R730xd servers.

 

RapidIO.org Technical Working Group – Chaired by Barry Wood, IDT

Chaired by Barry Wood of IDT, the RapidIO.org Technical Working Group consist of several Task Groups working on various specification development efforts that will be integrated into the RapidIO.org specification stack.  Participation in these Task Groups is open to all active RapidIO.org members.

ARM 64-bit Coherent Scale Out Task Group – Chaired by Sam Fuller,NXP

The ARM 64-bit Coherent Scale Out over RapidIO Task Group is responsible for developing a specification for multi SoC / core coherent scale out of ARM 64-bit cores with the following functionality:

• coherent scale out of a few 10s to 100s cores & 10s of sockets
• ARM AMBA® protocol mapping to RapidIO protocols
• AMBA 4 AXI4/ACE mapping to RapidIO protocols
• AMBA 5 CHI mapping to RapidIO protocols
• Migration path from AXI4/ACE to CHI and future ARM protocols
• support for NPU / GPU/ DSP / FPGA heterogeneous systems
• HW hooks and definition to support RDMA, MPI, secure boot, authentication, SDN, Open Flow, Open Data Plane, etc
• Other functionality as necessary to for performance critical computing – support Data Center, HPC and Networking Infrastructure system development and deployment

Software Task Group – Chaired by Barry Wood, IDT

The RapidIO Software Task Group is responsible for developing open source interface definitions and APIs using the “C” language under the Linux operating system for the following functionality:

• Linux Kernel enhancements for RapidIO fabrics and endpoints
  • “Raw Driver” interfaces which support all endpoints
  • Fault tolerance / hot swap support
  • Customizable / optional enumeration / fabric discovery
• Data Path Library for high performance data transfers between RapidIO endpoints
  • RDMA, Sockets, and Channelized Messaging
  • Reference implementation uses “Raw driver”
  • User Mode Driver for maximum performance
    
• Fabric Management Library and Command Line Interpreter for RapidIO fabrics and endpoint management
  • Uses “Raw Driver” interfaces
  • Portable across endpoints and operating systems
  • Command Line Interpreter for basic configurability

100G+ PHY Task Group – Chaired by Chris Shelsky, Nexus Technology

The 100G+ PHY Task Group charter is to develop higher performance PHY specifications for the RapidIO protocol with the following requirements:

• Determine and define 25G per lane or greater PHY leveraging industry standard specification(s)
• Evaluate and confirm PHY definition will improve or maintain existing PHY characteristics
  • Improve power efficiency
  • Maintain asymmetric link operation
  • Maintain low latency characteristics
  • Maintain fault tolerant characteristics
  • Maintain reliability characteristics assuming a bit error rate of less than 10^-12
• Specify a low latency PHY suitable for dual and quad-socket cache coherency applications
• Outline and prioritize additions/improvements to the PHY feature set
• Other additions and improvements to the PHY feature set as requested

Storage Task Group – Acting Chair, Barry Wood, IDT

The Storage Task Group charter is to develop higher performance storage centric specifications for the RapidIO protocol with the following requirements:

• Create a RapidIO storage system reference design – Demonstrates RapidIO implementation of “basic” storage system functionality
• Optimize RapidIO network efficiency of the RapidIO storage reference design
  • guaranteed low latency delivery of high priority packets
  • Virtualization, fault tolerance, flow control
• Enable existing storage applications to migrate to RapidIO based solutions
  • software/hardware interoperability with existing standards
• Refine architecture to demonstrate use of RapidIO priorities within NVMe
• Investigate NVMf over RapidIO 
  • Possible prototyping of NVMf over RapidIO with the RapidIO SW stack

RapidIO.org Marketing Working Group – Chaired by Ravi Thummarukudy, Mobiveil

The RapidIO.org Marketing Working Group manages the promotion of RapidIO unified fabrics and related products. The group meets regularly to plan for participation in various industry conferences and exhibitions.

Review of 2015 RapidIO.org Events

• Jan 19-20, 2015 VITA Embedded Tech Trends RapidIO.org Executive Director Rick O’Connor provided a RapidIO Industry Update at VITA Embedded Tech Trends on January 20th, 2015.
• Feb 25-26, 2015 Linley Data Center Conference RapidIO.org attended the Linley Data Center Conference and had a table-top exhibit during the evening reception on February 25th.
• Apr 14-16, 2015 Ethernet Technology Summit RapidIO.org members Mobiveil, IDT and Mirabilis Design attended the 2015 Ethernet Technology Summit and demonstrated: The RapidIO DCCN system, Heterogeneous computing with low power ARM+GPU accelerators, Simulation Model of a Ethernet Cluster of RapidIO-based system, and Verification of FPGA-based implementation using a virtual network model. 
  
• Apr 20-24, 2015 HEART Technical Interchange Meeting (TIM) RapidIO.org members AFRL, Mobiveil, Texas Instruments, FET Corp and Mirabilis Design attended the 2015 Hardened Electronics and Radiation Technology (HEART) Conference. Mobiveil provided information about their Gen2 and Gen 3(10xN) RapidIO IP blocks, TI displayed the HP ProLiant m800, FET Corp demonstrated the RapidFET Probe2.0, and Mirabilis Design demonstrated verification of FPGA-based implementation using a virtual network model.
• June 10, 2015 Linley Carrier Conference RapidIO.org members Mobiveil and Mirabilis Design attended the 2015 Linley Carrier Conference. Mobiveil provided information about their Gen2 and Gen 3(10xN) RapidIO IP blocks and Mirabilis Design demonstrated High Performance HSA Computer for Carrier application. Trevor Hiatt, product manager at Integrated Device Technology (IDT) also gave a presentation titled “Supercomputing at the Edge with Serial RapidIO”, view Trevor’s presentation here.
• June 11, 2015 CERN Meet Up with OCP HPC Project RapidIO.org Executive Director, Rick O’Connor presented a RapidIO.org Update on Supercomputing and HPC.
• June 22-25,2015 FTF 2015 RapidIO.org attended the Freescale Technology Forum (FTF 2015) along with member companies Freescale, FET Corp, Starbridge, and System Fabric Works to demonstrate a multi-vendor setup using RapidIO as a unified fabric to scale out a cluster of 6 Freescale T4 processors. RapidIO.org also presented a technical session titled: RapidIO Unified Fabric for QorIQ T4 Series Scale Out.
• June 29-30, 2015 2nd RISC-V Workshop RapidIO.org Executive Director, Rick O’Connor presented a RapidIO update at this workshop, view Ricks’ presentation here.
• July 12-16,2015 ISC Frankfurt 2015 RapidIO.org attended along with member companies Concurrent Technologies, IDT ,N.A.T., Prodrive Technologies and Texas Instruments the 2015 ISC High Performance Conference. Demonstrations included: Concurrent’s modular based approach to heterogeneous computing; IDT’s High Performance Analytics Lab with Heterogeneous RapidIO based low latency computing; N.A.T.‘s high performance platforms which interconnect to external networks through multiple low latency copper/optical RapidIO and 10 GbE interfaces;  Prodrive demonstrated their latest building blocks and infrastructure technology for heterogeneous HPC, based on low-latency RapidIO switching technology; and TI  demonstrated applications built on convolutional neural networks (CNNs) and graph libraries running on HP Moonshot with m800 cartridges featuring TI SoCs with ARM A15s and C66x DSPs.
• Oct 6-7, 2015 Linley Processor Conference RapidIO.org attended the Linley Processor Conference October 6-7, 2015 and exhibited during the evening reception.
• Nov 10, 2015 RapidIO.org Annual General Meeting For RapidIO.org members. Hosted by IDT in San Jose, CA.
• Nov 16-20, 2015 – Supercomputing Austin 2015 RapidIO.org along with member companies A3Cube, Integrated Device Technology (IDT), Prodrive Technologies and Texas Instruments exhibited at the SC15 Conference.

2016 RapidIO.org Events

• Feb 9-10, 2016 – Linley Data Centre Conference Join RapidIO.org at the Linley Data Center Conference and visit the RapidIO.org table-top exhibit during the evening reception on February 9th. Also don’t miss the presentation by Devashish Paul of IDT titled: “Edge + Data-Center Analytics for Mobile Networks with RapidIO”. 
• Jun 19-23, 2016 – ISC High Performance Conference Frankfurt 2016
• Sept 27-28, 2016 – Linley Processor Conference
• Nov 14-17, 2016 – Supercomputing Salt Lake City 2016

Thank you to all of our members for your continued support!

Thank you to all of our members for your continued support and we are looking forward to a successful 2016! Also, don’t forget to connect with us on Social Media for even more RapidIO.org related news, events and information.

Cheers,

Rick