As the spring season takes hold, this is proving to be a busy 2015 here at RapidIO.org. The RapidIO.org community continues to be very active with several new members joining the community and many key task groups working to augment the RapidIO specification stack. Here is a look back at the significant RapidIO.org related events and news from the Winter and Spring of 2015.
New RapidIO.org Members
RapidIO.org Recent News
- Feb 25 IDT, NVIDIA and Orange Silicon Valley Drive Supercomputing to Edge of Wireless Network for Real-Time Analysis and Services – Integrated Device Technology, Inc. has developed with NVIDIA® and Orange Silicon Valley a supercomputing platform that can analyze 4G to 5G base station bandwidth data in real time, enabling network operators to monetize the voluminous data flowing through their communications systems.
- Feb 27 New AdvancedMC® module powered by NVIDIA® Tegra® K1 processors – Concurrent Technologies announced AG A1x/m1d, a new AdvancedMC® (AMC) module for High Performance Embedded Computing (HPEC) applications based on multiple NVIDIA® Tegra® K1 mobile processors that use the same NVIDIA Kepler™ GPU core designed into supercomputers around the world.
- Mar 3 Prodrive Technologies Launches PRSB-760G2 for large RapidIO networks – Prodrive Technologies extends its range of RapidIO Gen2 products with the PRSB-760G2, offering a market-leading 760Gbps of aggregate full-duplex bandwidth.
- Mar 19 Will RapidIO Become The Fabric For ARM-Based Servers? – Original article by: Chris A. Ciufo, Editor-in-Chief, Embedded; Extension Media. Original article published on the EECatalog website.
- Mar 31 IDT Collaborates With CERN to Speed and Improve Data Analytics at Large Hadron Collider and Data Center – Integrated Device Technology, Inc. has entered a three-year collaboration with the European Organization for Nuclear Research (CERN) to use IDT’s RapidIO technology to help improve data acquisition and analysis in some of the world’s most advanced fundamental physics research.
- Apr 1 Mobiveil Announces Major Customer Design Win with a Multinational Telecommunications Company for Its RapidIO 10xN (Gen3) Digital Controller IP – Working with Leading SerDes Partners Mobiveil to Provide Pre-Verified, Fully Integrated RapidIO 10xN IP Offering Multi-Channel Data Messaging and Data Streaming at 40Gbps.
- Apr 28 42: Answer to the Ultimate Question and RapidIO Supercomputing at CERN – Article from Paul Whytock at Electropages covering the announced RapidIO based collaboration between CERN and IDT to provide low-latency RapidIO interconnect technology to improve the efficient analysis of mass data from the LHC.
RapidIO.org Technical Working Group – Chaired by Barry Wood, IDT
Chaired by Barry Wood of IDT, the RapidIO.org Technical Working Group consist of several Task Groups working on various specification development efforts that will be integrated into the RapidIO.org specification stack. Participation in these Task Groups is open to all active RapidIO.org members.
ARM 64-bit Coherent Scale Out Task Group – Chaired by Sam Fuller, Freescale
The ARM 64-bit Coherent Scale Out over RapidIO Task Group is responsible for developing a specification for multi SoC / core coherent scale out of ARM 64-bit cores with the following functionality:
- coherent scale out of a few 10s to 100s cores & 10s of sockets
- ARM AMBA® protocol mapping to RapidIO protocols
- AMBA 4 AXI4/ACE mapping to RapidIO protocols
- AMBA 5 CHI mapping to RapidIO protocols
- Migration path from AXI4/ACE to CHI and future ARM protocols
- support for NPU / GPU/ DSP / FPGA heterogeneous systems
- HW hooks and definition to support RDMA, MPI, secure boot, authentication, SDN, Open Flow, Open Data Plane, etc
- Other functionality as necessary to for performance critical computing – support Data Center, HPC and Networking Infrastructure system development and deployment
Software Task Group – Chaired by Barry Wood, IDT
The RapidIO Software Task Group is responsible for developing open source interface definitions and APIs using the “C” language under the Linux operating system for the following functionality:
- Linux Kernel enhancements for RapidIO fabrics and endpoints
- “Raw Driver” interfaces which support all endpoints
- Fault tolerance / hot swap support
- Customizable / optional enumeration / fabric discovery
- Data Path Library for high performance data transfers between RapidIO endpoints
- RDMA, Sockets, and Channelized Messaging
- Reference implementation uses “Raw driver”
- User Mode Driver for maximum performance
- Fabric Management Library and Command Line Interpreter for RapidIO fabrics and endpoint management
- Uses “Raw Driver” interfaces
- Portable across endpoints and operating systems
- Command Line Interpreter for basic configurability
Verification Task Group – Chaired by Terry Omar, Praesum
The RapidIO Verification Task Group is responsible for enhancing the System Verilog Universal Verification Methodology (UVM) RapidIO Bus Functional Model (BFM) in accordance with the following requirements:
- Define features to be added to the BFM
- RapidIO Specification 3.1 extensions including the NGSIS Space Profile
- ARM 64-bit coherency support
- Define new licensing model for BFM
- Define interfaces to support customization / integration with AXI BFMs
- Develop baseline verification environment for FPGA and SoC developments
100G+ PHY Task Group – Chaired by Chris Shelsky, Nexus Technology
The 100G+ PHY Task Group charter is to develop higher performance PHY specifications for the RapidIO protocol with the following requirements:
- Determine and define 25G per lane or greater PHY leveraging industry standard specification(s)
- Evaluate and confirm PHY definition will improve or maintain existing PHY characteristics
- Improve power efficiency
- Maintain asymmetric link operation
- Maintain low latency characteristics
- Maintain fault tolerant characteristics
- Maintain reliability characteristics assuming a bit error rate of less than 10^-12
- Specify a low latency PHY suitable for dual and quad-socket cache coherency applications
- Outline and prioritize additions/improvements to the PHY feature set
- Other additions and improvements to the PHY feature set as requested
RapidIO.org Marketing Working Group – Chaired by Ravi Thummarukudy, Mobiveil
The RapidIO.org Marketing Working Group manages the promotion of RapidIO unified fabrics and related products. The group meets regularly to plan for participation in various industry conferences and exhibitions.
- Jan 19-20, 2015 VITA Embedded Tech Trends RapidIO.org Executive Director Rick O’Connor provided a RapidIO Industry Update at VITA Embedded Tech Trends on January 20th, 2015.
- Feb 25-26, 2015 Linley Data Center Conference RapidIO.org attended the Linley Data Center Conference and had a table-top exhibit during the evening reception on February 25th.
- Apr 14-16, 2015 Ethernet Technology Summit RapidIO.org members Mobiveil, IDT and Mirabilis Design attended the 2015 Ethernet Technology Summit and demonstrated: The RapidIO DCCN system, Heterogeneous computing with low power ARM+GPU accelerators, Simulation Model of a Ethernet Cluster of RapidIO-based system, and Verification of FPGA-based implementation using a virtual network model.
- Apr 20-24, 2015 HEART Technical Interchange Meeting (TIM) RapidIO.org members AFRL, Mobiveil, Texas Instruments, FET Corp and Mirabilis Design attended the 2015 Hardened Electronics and Radiation Technology (HEART) Conference. Mobiveil provided information about their Gen2 and Gen 3(10xN) RapidIO IP blocks, TI displayed the HP ProLiant m800, FET Corp demonstrated the RapidFET Probe2.0, and Mirabilis Design demonstrated verification of FPGA-based implementation using a virtual network model.
Please contact RapidIO.org for information on upcoming events and participation details.
- June 10, 2015 – Linley Carrier Conference
- June 22-25,2015 – FTF Americas 2015
- July 12-16,2015 – ISC Frankfurt 2015
- Oct 6-7, 2015 – Linley Processor Conference
- Nov 10-12, 2015 – ARM Tech Con 2015
- Nov 16-20, 2015 – Supercomputing Austin 2015
- Dec 1-3, 2015 – Open Server Summit 2015
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