RapidIO.org
Phone: 512-401-2900
For release: 03 Feb 2014
Task group develops Phase I of RapidIO based open reference designs for use in organizations such as the Open Compute Project, Scorpio, Financial data centers, supercomputers and compute data center applications.
Austin, TX – February 3rd, 2014 – RapidIO.org, the organization that promotes and develops standards for the RapidIO interconnect architecture announces the first public demonstration of the Phase 1 reference design released by the Data Center Compute and Networking Task Group (DCCN). The DCCN System, which will be shown at the Linley Group Data Center Conference February 5th & 6th in Santa Clara, California, is targeted at Server, Data Center and Supercomputing applications and showcases the strength of the entire RapidIO ecosystem with multi-vendor collaboration.
This initial DCCN reference design, built by RapidIO member Prodrive Technologies, is vendor and processor agnostic, and the design specifications are being made available to other open standards in the computing industry (e.g. Open Compute Project and Scorpio) and will also be available for use by OEM’s of computing and data center infrastructure, research labs and government organizations.
Key features of the DCCN System include:
- Processor Architecture independent
- TI DSP/ARM 470 x 4 ≈ 2 Tflops
- Freescale Dual core PowerPC @ 2.1 GHz x 4 (total 8 cores)
- Intel x86 Quad Core i7 @ 2.1 GHz
- Xilinx FPGAs
- 412k x 4 = 1648k logic cells
- 64k4 x 4 = 257k6 slices
- IDT RapidIO 20 Gbps per port switching with 100ns latency and PCIe-2 to RapidIO 20 Gbps NIC
- 8x 2.5″ HDD storage bays (SATA-3)
- Up to four industry standard AMC daughter cards
- 40G RapidIO Gen2 per daughter card
- 2x 20 Gbps quad-lane
- 80G RapidIO Gen2 to back rack
- 4x 20 Gbps quad-lane
- 20G RapidIO Gen2 Internal link bandwidth
- 10G Ethernet per daughter card
- 1x 10 Gigabit Ethernet
- 40G Ethernet to back rack
- 4x 10 Gigabit Ethernet
- 2x 1G Ethernet to back rack
- 4x 1G Ethernet to daughter card
“Under the leadership of DCCN Task Group chair, Marco Rietveld (dccn-chair@rapidio.org), the DCCN team has worked collaboratively to create designs using existing RapidIO semiconductors, boards and firmware, to address the needs of server systems in 19 or 21 inch rack form factors. This work shows the tremendous benefits of the RapidIO architecture in general computing, super computing or analytics driven server applications that require low latency, low power and scalable peer to peer inter processor communication,” said Rick O’Connor, Executive Director of RapidIO.org, “We are very pleased with this result and look forward to showcasing the DCCN System at the Linley Group Data Center event on February 5th & 6th, 2014.”
About RapidIO.org
RapidIO.org, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RapidIO architecture. The RapidIO architecture promises lower-latency, increased bandwidth efficiency, lower cost and lower power. Interested companies are invited to join the RapidIO Trade Association to gain access to the standards development process. Detailed information on the RapidIO specification, products, design tools, member companies, and membership is available at www.RapidIO.org.